# Memory Constraints of the Apollo Guidance Computer: 76KB Architecture Explained > Discover the surprising memory constraints of the Apollo Guidance Computer with its 76KB architecture. Learn how programmers achieved lunar landings with limited resources. - Repository: [Chris Garry/Apollo-11](https://github.com/chrislgarry/Apollo-11) - Tags: deep-dive - Published: 2026-03-04 --- **The Apollo Guidance Computer operated with only 76KB of total memory—36,864 words of hand-woven core rope ROM and 2,048 words of magnetic core RAM—forcing programmers to use bank switching, fixed-point arithmetic, and highly optimized assembly code to execute lunar landing algorithms.** The memory constraints of the Apollo Guidance Computer (AGC) represent one of the most extreme examples of resource-limited computing in history. As documented in the `chrislgarry/Apollo-11` repository, the AGC's software had to fit within approximately 76KB of total storage while managing real-time spacecraft navigation. These severe limitations dictated every aspect of the system architecture, from the 15-bit word size to the bank-switching mechanisms that expanded the addressable space. ## Understanding the AGC Memory Architecture The Apollo Guidance Computer utilized two distinct memory technologies to balance permanence and flexibility within strict size, weight, and power limits. According to the hardware documentation in [`docs/AGC_Architecture.md`](https://github.com/chrislgarry/Apollo-11/blob/main/docs/AGC_Architecture.md), the system divided memory into fixed read-only storage and erasable working memory. ### Core Rope Read-Only Memory (ROM) The AGC stored its guidance programs and navigation constants in **36,864 words** (approximately 72KB) of core rope memory. This ROM employed hand-woven core rope technology, where software was literally woven into the hardware by threading small magnetic cores with wires. Because this memory was read-only and physically woven, debugging required manufacturing new rope modules—a process that demanded extreme precision during initial assembly coding. ### Erasable Magnetic Core Memory (RAM) For temporary variables and real-time calculations, the AGC provided only **2,048 words** (approximately 4KB) of erasable magnetic core memory. This RAM held flight-data registers, intermediate computational results, and variables that changed during mission execution. With fewer than 2,000 words available for dynamic data, programmers in the `chrislgarry/Apollo-11` source code had to meticulously budget every storage location, often reusing memory addresses for different purposes during different flight phases. ### 15-Bit Word Size and Address Space All data and instructions in the AGC utilized a **15-bit word size** with an additional parity bit for error detection. The 15-bit limitation forced compact data representations and eliminated the possibility of standard floating-point arithmetic. The computer's instruction format packed two 12-bit addresses into a 16-bit word, creating a logical address space of 4KB per memory bank that required special banking hardware to navigate. ## Bank Switching and the 4KB Memory Limit To overcome the 12-bit address limitation (which only allows direct addressing of 4,096 locations), the AGC implemented a **bank-switching** mechanism across four distinct memory banks. This technique swapped between banks to give the illusion of a larger address space while keeping individual instruction addresses within the 4KB limit. When executing code from the 36KB ROM or accessing data in the 2KB RAM, the computer used bank registers to select which 4KB segment was currently active. This architecture appears throughout the assembly files in the repository, where programmers explicitly managed bank selection to access different program segments. The simulator in [`src/agnc_sim.c`](https://github.com/chrislgarry/Apollo-11/blob/main/src/agnc_sim.c) emulates this four-bank addressing scheme to ensure historical accuracy when running the original guidance software. ## Coding Strategies for Severe Memory Constraints The stringent memory limits of the Apollo Guidance Computer forced engineers to adopt several clever optimization techniques that appear throughout the `chrislgarry/Apollo-11` codebase. ### Fixed-Point Arithmetic Because floating-point hardware would have consumed excessive memory and processing cycles, all calculations used **scaled integer (fixed-point) arithmetic**. Programmers manually tracked binary point locations through every calculation, ensuring sufficient precision for navigation while keeping data within 15-bit word limits. This approach conserved both ROM space (no floating-point libraries) and RAM (simpler data structures). ### Hand-Optimized Assembly Every instruction in the Apollo Guidance Computer Software (AGCS) was hand-crafted for size and speed. Common optimizations included combining multiple operations into single instructions and omitting redundant loads. The assembly code demonstrates how programmers utilized the accumulator-based architecture to minimize memory accesses, frequently keeping active variables in registers rather than spilling to the limited 2KB RAM. ## Code Example: RAM Allocation in mini_nav.asm The file `AGC-Demo/mini_nav.asm` illustrates how developers worked within the 2,048-word RAM constraint. The following snippet shows basic memory operations using the `CA` (Clear and Add) and `TS` (Transfer to Storage) instructions to move data between the accumulator and specifically allocated RAM addresses: ```assembly ; Example AGC assembly (from AGC-Demo/mini_nav.asm) CA COUNTER ; Load RAM address COUNTER (2,048-word limit) TS RESULT ; Store intermediate result CAF #1000 ; Load constant (fixed-point scale factor) TS SCALE ... ``` - **CA** copies data from a RAM location into the accumulator, enforcing the 2,048-word address boundary. - **TS** transfers data from the accumulator back to a specific erasable memory address. - The **#** prefix indicates an immediate constant, which must fit within the 15-bit word size. This pattern of explicit memory management appears throughout the lunar landing codebase, where every RAM word had a specific, pre-allocated purpose. ## Summary - The Apollo Guidance Computer operated with **76KB total memory**, split between 36,864 words of core rope ROM and 2,048 words of erasable RAM. - **Bank switching** across four 4KB banks allowed the system to access its full address space despite using 12-bit addressing. - **15-bit word sizes** with parity bits necessitated fixed-point arithmetic and eliminated floating-point operations. - The `chrislgarry/Apollo-11` repository contains hand-optimized assembly code in files like `AGC-Demo/mini_nav.asm` that demonstrates these memory constraints in practice. ## Frequently Asked Questions ### How much memory did the Apollo Guidance Computer have in total? The AGC contained approximately **76KB of usable memory**. This consisted of 36,864 words (roughly 72KB) of fixed core rope ROM for program storage and 2,048 words (approximately 4KB) of erasable magnetic core RAM for temporary data. This total memory capacity was thousands of times smaller than modern smartphone storage. ### What type of memory technology did the AGC use? The AGC used two distinct technologies: **core rope memory** for ROM, which was physically woven by hand to store permanent guidance programs, and **magnetic core memory** for RAM, which used small ferrite rings that could be magnetized in either direction to represent bits. The core rope modules were manufactured by threading wires through or around magnetic cores to create hard-wired program logic. ### Why did the Apollo Guidance Computer use bank switching? Bank switching was necessary because the AGC's instruction format only provided **12-bit addresses**, which could directly reference 4,096 words (4KB). To access the full 36KB of ROM and 2KB of RAM, the system used four memory banks and special bank-switching instructions to select which 4KB segment was currently active. This technique effectively multiplied the addressable space without increasing the instruction word size. ### Where can I examine the original AGC assembly code? The complete source code is available in the `chrislgarry/Apollo-11` repository on GitHub. Key files include `AGC-Demo/mini_nav.asm` for memory allocation examples, [`docs/AGC_Architecture.md`](https://github.com/chrislgarry/Apollo-11/blob/main/docs/AGC_Architecture.md) for hardware specifications, and [`src/agnc_sim.c`](https://github.com/chrislgarry/Apollo-11/blob/main/src/agnc_sim.c) for the C-based simulator that emulates the original memory constraints. The repository preserves the original assembly language source code exactly as flown on the Apollo missions.